Hardware-Oriented Fixed-Point Exploration of Multi-Edge LDPC Decoders for CV-QKD

High-speed low-density parity-check (LDPC) decoding is a major bottleneck in continuous-variable quantum key distribution (CV-QKD) and motivates hardware acceleration with fixed-point arithmetic. This work compares the sum-product algorithm (SPA), min-sum algorithm (MSA), and normalized min-sum (NMS) under a unified low-SNR fixed-point framework using common graph, matrix, and quantization settings. Multiple formats are evaluated through frame error rate (FER), with emphasis on identifying the lowest tested numerical precision that preserves viable reconciliation. The results show that the lowest viable tested precision is decoder-dependent. SPA achieved the best overall decoding performance. Among the reduced complexity decoders, MSA required Q16.8 to preserve viable reconciliation, whereas NMS remained operational at Q12.6. SPA preserved reliable decoding down to Q8.4, offering the most favorable combination of decoding reliability and fixed-point word-length reduction within the evaluated numerical framework.