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Sociedade Brasileira de Telecomunicações

Desempenho do Algoritmo Paralelo CORDIC em Implementac¸ao em FPGA


This article presents a design in digital hardware for transcendental function computation (magnitude and phase of a complex number) using vector coordinates in the CORDIC algorithm in vectoring mode. The code was synthesized for FPGA using Xilinx development tools for the Spartan-3E xc3s500e family. Besides, performance analysis is realized changing algorithm parameters and the number of iterations. The results are at state of art for present practice with 16 word width requiring 16 interactions. These results validate the proposed architecture for the CORDIC algorithm

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