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Sociedade Brasileira de Telecomunicações

Design and Implementation of Fast Fourier Transform Algorithm in FPGA


This paper shows a design and implementation of a radix-4 FFT in FPGA using a Xilinx Spartan-6. The decimation in time equations are reviewed and in sequence several FPGA modules are presented according to algorithm architecture looking for optimization in execution time and occupied device area. Several tests were performed in order to validate the algorithm performance, FFT functionality, and time performance analysis. The proposed architecture is of low cost and very efficient for FFT computation.

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