Arquiteturas FPGA para Cômputo da Matriz de Covariância Amostral em Sensoriamento Espectral
Elivander J. T. Pereira, Dayan A. Guimarães

DOI: 10.14209/sbrt.2022.1570810969
Evento: XL Simpósio Brasileiro de Telecomunicações e Processamento de Sinais (SBrT2022)
Keywords: Sensoriamento espectral aritmética de ponto fixo FPGA CORDIC
Many of the test statistics for spectrum sensing in cognitive radio networks make use of the received signal sample covariance matrix (SCM), which is the case of the Pietra-Ricci index detector (PRIDe). This article compares two hardware architectures for computing the SCM in field programmable gate array (FPGA). The coordinate rotation digital computer (CORDIC) algorithm with few iterations arises as an alternative to the conventional architecture for the multiplication of complex samples, promising to bring significant hardware savings to the implementation of the PRIDe.